HD74HC668 Datasheet, PDF (7/11 Pages) Hitachi Semiconductor – Synchronous UP/Down Decade,4-bit binary Counter

HD74HC668, HD74HC669
Switching Characteristics (C_L = 50 pF, Input t_r = t_f = 6 ns)
Item
Maximum clock
Frequency
Propagation delay
time
Pulse width
Setup time
Hold time
Output rise/fall
time
Input capacitance
Symbol VCC (V)
fmax
2.0
4.5
6.0
tPLH
2.0
tPHL
4.5
6.0
tPLH
2.0
tPHL
4.5
6.0
tPLH
2.0
tPHL
4.5
6.0
tPLH
2.0
tPHL
4.5
6.0
tw
2.0
4.5
6.0
tsu
2.0
4.5
6.0
tsu
2.0
4.5
6.0
tsu
2.0
4.5
6.0
tsu
2.0
4.5
6.0
th
2.0
4.5
6.0
tTLH
2.0
tTHL
4.5
6.0
Cin
—
Ta = 25°C
Min Typ Max
—— 5
— — 27
— — 32
— — 200
— — 40
— — 34
— — 225
— — 45
— — 38
— — 150
— — 30
— — 26
— — 200
— — 40
— — 34
80 — —
16 — —
14 — —
100 — —
20 — —
17 — —
150 — —
30 — —
26 — —
150 — —
30 — —
26 — —
150 — —
30 — —
26 — —
5
——
5
——
5
——
— — 75
— 5 15
— — 13
— 5 10
Ta = –40 to +85°C
Min
Max Unit
Test Conditions
—
4 MHz
—
21
—
25
—
250 ns Clock to Ripple carry out
—
50
—
43
—
280 ns Clock to Q
—
56
—
48
—
190 ns Enable T to Ripple carry out
—
38
—
33
—
250 ns U/D to Ripple carry out
—
50
—
43
100
—
ns
20
—
17
—
125
—
ns Data to Clock
25
—
21
—
190
—
ns Enable P, T to Clock
38
—
33
—
190
—
ns Loadk to Clock
38
—
33
—
190
—
ns U/D to Clock
38
—
33
—
5
—
ns
5
—
5
—
—
95
ns
—
19
—
16
—
10
pF
Rev.2.00 Mar 30, 2006 page 7 of 10