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HD74HC592 Datasheet, PDF (7/9 Pages) Hitachi Semiconductor – 8-bit Register/Binary Counter
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HD74HC592
• Waveform – 3 (CCLR to RCO, CCLR to CCK)
tf
tr
Input CCLR
90 %
50 %
10 % 10 %
tW
90 %
50 %
trem
Input CCK
tPLH
50 %
10 %
90 %
tr
Output RCO
50 %
10 %
90 %
tTLH
Note : 1. Input waveform : PRR ≤ 1 MHz, duty cycle 50%, tr ≤ 6 ns, tf ≤ 6 ns
• Waveform – 4 (CCKEN, RCK to CCK)
tr
Input CCKEN
RCK
10 %
90 %
50 %
tsu
tf
90 %
50 %
th
10 %
tsu
50 %
th
Input CCK
50 %
10 %
tr
90 %
50 %
10 %
tf
50 %
Note : 1. Input waveform : PRR ≤ 1 MHz, duty cycle 50%, tr ≤ 6 ns, tf ≤ 6 ns
VCC
0V
VCC
0V
VOH
VOL
VCC
0V
VCC
0V
• Waveform – 5 (Data to RCK)
tr
tf
90 %
90 %
VCC
Input Data
50 %
50 %
50 %
10 %
10 %
0V
tsu
th
tsu
th
90 %
VCC
Input RCK
50 %
50 %
10 %
10 %
0V
tr
tf
Note : 1. Input waveform : PRR ≤ 1 MHz, duty cycle 50%, tr ≤ 6 ns, tf ≤ 6 ns
Rev.2.00 Mar 30, 2006 page 7 of 8
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