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HD74HC240_15 Datasheet, PDF (7/10 Pages) Renesas Technology Corp – Octal Buffers/Line Drivers/Line Receivers (with inverted 3-state outputs) | |||
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HD74HC240
Test Circuit
VCC
Input
Pulse Generator
Zout = 50 â¦
VCC
1G, 2G
Output
1Y1 to 2Y4
1A1 to 2A4
1 k ⦠S1
CL =
50 pF
OPEN
GND
VCC
Note : 1. CL includes probe and jig capacitance.
TEST
tPLH / t PHL
tZH/ t HZ
tZL / t LZ
S1
OPEN
GND
VCC
Waveforms
⢠Waveform â 1
tf
tr
90 %
90 %
VCC
Input A
50 %
50 %
10 %
10 %
0V
tPLH
tPHL
Output Y
50 %
10 %
90 %
tTLH
90 %
VOH
50 %
10 %
VOL
tTHL
⢠Waveform â 2
tf
tr
90 %
90 %
VCC
Input G
50 %
50 %
10 %
10 %
0V
tZL
tLZ
VOH
Waveform â A
50 %
10 %
tZH
tHZ
VOL
Waveform â B
90 %
VOH
50 %
VOL
Notes : 1. Input waveform : PRR ⤠1 MHz, duty cycle 50%, tr ⤠6 ns, tf ⤠6 ns
2. Waveformâ A is for an output with internal conditions such that the
output is low except when disabled by the output control.
3. Waveformâ B is for an output with internal conditions such that the
output is high except when disabled by the output control.
4. The output are measured one at a time with one transition per measurement.
Rev.2.00 Jan 31, 2006 page 5 of 7
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