HD49338F_15 Datasheet, PDF (7/25 Pages) Renesas Technology Corp – CDS/PGA & 12-bit A/D Converter

HD49338F/HF
Block Diagram
ADCIN 27
Y IN 26
PBLK 26
CDSIN 26
BLKSH 28
BLKC 28
CDS
16 18 19
Timing
generator
31 16 18 19 19
PGA
12 bit
ADC
BLKFB 29
DC offset
compensation
circuit
Serial
interface
Bias
generator
17
44 45 43
35 32 34 33
42 OEB
11 D11
10 D10
9 D9
8 D8
7 D7
6 D6
5 D5
4 D4
3 D3
2 D2
D1
D0
Rev.2.00 May 20, 2005 page 5 of 22