3803 Datasheet, PDF (63/119 Pages) Renesas Technology Corp – SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER

3803 Group (Spec.L)
RESET CIRCUIT
To reset the microcomputer, RESET pin should be held at an “L”
level for 16 cycles or more of XIN. Then the RESET pin is
returned to an “H” level (the power source voltage should be
between 1.8 V and 5.5 V (between 2.7 V to 5.5 V for flash
memory version), and the oscillation should be stable), reset is
released. After the reset is completed, the program starts from the
address contained in address FFFD16 (high-order byte) and
address FFFC16 (low-order byte). Make sure that the reset input
voltage for the mask ROM version is less than 0.29 V for VCC of
1.8 V.
In the flash memory version, input to the RESET pin in the
following procedure.
• When power source is stabilized
(1) Input “L” level to RESET pin.
(2) Input “L” level for 16 cycles or more to XIN pin.
(3) Input “H” level to RESET pin.
• At power-on
(1) Input “L” level to RESET pin.
(2) Increase the power source voltage to 2.7 V.
(3) Wait for td(P-R) until internal power source has stabilized.
(4) Input “L” level for 16 cycles or more to XIN pin.
(5) Input “H” level to RESET pin.
RESET
RESET
VCC
VCC
(1)
0V
RESET
0V
0.2VCC or less
(2)
5V
VCC
Power source
VCC _{voltage detection 0 V}
circuit
5V
RESET
0V
2.7 V
td(P-R)+XIN16 cycles or more
Example at VCC = 5 V
Notes 1: Reset release voltage
•mask ROM version: VCC = 1.8 V
•Flash memory version: VCC = 2.7 V
2: In the flash memory version, this time is required td(P-R)+XIN 16 cycles
or more.
Fig 60. Reset circuit example
XIN
φ
RESET
Internal
reset
Address
Data
SYNC
?
?
?
?
FFFC FFFD ADH,L
Reset address from the
vector table.
?
?
?
?
ADL
ADH
XIN : 10.5 to 18.5 clock cycles
Notes 1: The frequency relation of f(XIN) and f(φ) is f(XIN) = 8 • f(φ).
2: The question marks (?) indicate an undefined state that depends on the previous state.
Fig 61. Reset sequence
Rev.1.00 Apr 2, 2007 Page 63 of 117
REJ03B0212-0100