RJJ0101DPD_15 Datasheet, PDF (6/9 Pages) Renesas Technology Corp – P Channel Power MOS FET High Speed Switching

RJJ0101DPD
Static Drain to Source on State Resistance
vs. Temperature
120
Pulse Test
100
–4 A
–1.8 V
80
60
–1 A
–1.5 A
–4 A ^{–1.5 A –1 A}
–2.5 V
40
I_D = –4 A, –1.5 A, –1 A
V_GS = –4.5 V
20
–25 0 25 50 75 100 125 150
Case Temperature Tc (°C)
Typical Capacitance vs.
Drain to Source Voltage
10000
V_GS = 0
f = 1 MHz
Ciss
1000
Coss
100
Crss
10
0 –2 –4 –6 –8 –10 –12
Drain to Source Voltage V_DS (V)
Switching Characteristics
1000
V_GS = –4.5 V, V_DD = –10 V
td(off)
tf
tr
100
td(on)
10
–0.1
–1
–10
Drain Current I_D (A)
–100
Forward Transfer Admittance vs.
Drain Current
100
Pulse Test
30
10
Tc = –25°C
3
75°C
25°C
1
0.3
0.1
–0.1
V_DS = –10 V
–0.3
–1
–3
–10
Drain Current I_D (A)
Dynamic Input Characteristics
0
0
I_D = –3 A
–8
–16
0
–5 V
–7 V
V_DD = –10, –12 V
–7 V
–5 V
–4
–10 V
V_DD = –12 V
10
Gate Charge Qg (nc)
–8
20
Reverse Drain Current vs.
Source to Drain Voltage
–16
Pulse Test
–12
–5 V
–8
V_GS = 0, 5 V
–4
Ta = 25°C
0
–0.4 –0.8 –1.2 –1.6 –2.0
Source to Drain Voltage V_SDF (V)
REJ03G1580-0300 Rev.3.00 Dec 19, 2008
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