RD74LVC2G125 Datasheet, PDF (6/8 Pages) Renesas Technology Corp – Dual Bus Buffer with 3-state Output

RD74LVC2G125
Test Circuit
From Output
CL
Load circuit
RL
S1
VTT
OPEN
GND
RL
TEST
S1
t_PLH / t_PHL
t_ZH / t_HZ
t_ZL / t_LZ
OPEN
GND
VTT
V_CC (V)
1.8±0.15
2.5±0.2
3.3±0.3
5.0±0.5
Input
V_I
V_CC
V_CC
V_CC
V_CC
t_r / t_f
≤ 2 ns
≤ 2 ns
≤ 2.5 ns
≤ 2.5 ns
V_ref
V_CC / 2
V_CC / 2
1.5 V
V_CC / 2
VTT
2 × V_CC
2 × V_CC
6V
2 × V_CC
C_L
30 pF
30 pF
50 pF
50 pF
R_L
1.0 kΩ
500 Ω
500 Ω
500 Ω
∆V
0.15 V
0.15 V
0.3 V
0.3 V
V_I
Input A
V_ref
V_ref
Output Y
t PLH
V_ref
t PHL
V_ref
0V
V _OH
V _OL
V_I
Input OE
V_ref
V_ref
t ZL
t LZ
0V
V_OH
Output Y
(Waveform – A)
V_ref
t ZH
V_OL + ∆V
t HZ
V _OL
Output Y
(Waveform – B)
V_ref
V_OH – ∆V
V _OH
V_OL
Notes: 1. C_L includes probe and jig capacitance.
2. Waveform–A is for an output with internal conditions such that the output is low except
when disabled by the output control.
3. Waveform–B is for an output with internal conditions such that the output is high except
when disabled by the output control.
4. All input pulses are supplied by generators having the following characteristics:
PRR ≤ 10MHz, Zo = 50 Ω.
5. The output are measured one at a time with one transition per measurement.
Rev.1.00 Jul 26, 2006 page 6 of 7