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R1EX25512ATA00A Datasheet, PDF (6/21 Pages) Renesas Technology Corp – Serial Peripheral Interface
R1EX25512ATA00A
(Ta = −40 to +85°C, VCC = 1.8 V to 5.5 V)
Parameter
Symbol
Alt
Min
Max
Unit
Notes
Clock frequency
fC
fSCK

3
MHz
S active setup time
tSLCH
tCSS1
100

ns
S not active setup time
tSHCH
tCSS2
100

ns
S deselect time
tSHSL
tCS
250

ns
S active hold time
tCHSH
tCSH
100

ns
S not active hold time
tCHSL

100

ns
Clock high time
tCH
tCLH
150

ns
1
Clock low time
tCL
tCLL
150

ns
1
Clock rise time
tCLCH
tRC

1
µs
2
Clock fall time
tCHCL
tFC

1
µs
2
Data in setup time
tDVCH
tDSU
30

ns
Data in hold time
tCHDX
tDH
50

ns
Clock low hold time after HOLD not active
tHHCH

200

ns
Clock low hold time after HOLD active
tHLCH

200

ns
Clock high setup time before HOLD active
tCHHL

120

ns
Clock high setup time before HOLD not
tCHHH

120

ns
active
Output disable time
Clock low to output valid
Output hold time
Output rise time
Output fall time
HOLD high to output low-Z
HOLD low to output low-Z
Write time
Erase / Write Endurance
tSHQZ
tDIS

200
ns
2
tCLQV
tV

150
ns
tCLQX
tHO
0

ns
tQLQH
tRO

100
ns
2
tQHQL
tFO

100
ns
2
tHHQX
tLZ

100
ns
2
tHLQZ
tHZ

100
ns
2
tW
tWC

5
ms


106

cycles
3
Notes: 1. tCH + tCL ≥ 1/fC
2. Value guaranteed by characterization, not 100% tested in production.
3. Value guaranteed by characterization, not 100% tested in products.
106 cycles (Ta = +25°C).
105 cycles (Ta = +85°C).
Rev.0.01, Dec.19.2008, page 6 of 19