PD17202AGF-011_15 Datasheet, PDF (6/30 Pages) Renesas Technology Corp – 4-BIT SINGLE-CHIP MICROCONTROLLER WITH LCD CONTROLLER/DRIVER AND KEY SCAN CIRCUIT FOR FPC (FRONT PANEL CONTROLLER)

µPD17202AGF-011
1. PIN FUNCTION
1.1 Pin Function List
Pin No.
1
to
25
26
58
27
28
29
to
34
35
36
Symbol
LCD24
to
LCD0
Pin Name
LCD segment
signal output
GND0
GND1
CLOCK
Ground
Clock input
LOAD Load input
K0
Key return signal
to
input
K5
INT
Key scan end
signal output
LED
LED output
Description
These pins output segment signals to an LCD panel.
They are used to control the display on the LCD panel by
forming a matrix with COM0 through COM2 (pins 62
through 64).
Ground pin
I/O Format
CMOS push-
pull output
–
Serial communication clock input.
Data is input to or output from the DATA pin (pin 43) at
the rising edge of the clock input to this pin.
Serial communication load input.
Commands are executed and the output status is cleared
in synchronization with the rising edge of this pin. While
this pin is high, clock input is invalid. This pin is con-
nected to an internal pull-up resistor.
These pins input key return signals from a key matrix.
These pins are connected to an internal pull-down resistor.
Input
Input
Input
This pin outputs a key scan end signal to the master
microcontroller.
It goes high when key scanning has ended after execution
of a key data output command.
This pin goes low at the rising edge of the LOAD pin (pin
28) after data has been output. While this pin is low, key
data cannot be correctly output.
The initial value of this pin is the low level. Be sure to
connect a pull-down resistor to this pin.
This pin is connected to an LED that is used to check
connection with the master microcontroller.
When this pin is low, the LED lights.
This pin is output depending on the LED data value of
display data input (data A, refer to 4.2 LCD Display Data
Configuration).
This pin is floated in the initial status.
CMOS push-
pull output
N-ch open-
drain output
5V
µ PD17202AGF-011
LED 36
37
KS0
Key source output These pins output key source signals to a key matrix.
N-ch open-
to
to
drain output
41
KS4
4