PD16780A_15 Datasheet, PDF (6/18 Pages) Renesas Technology Corp – 300 OUTPUT TFT-LCD SOURCE DRIVER

µ PD16780A
4. PIN FUNCTIONS
Pin Symbol
C1, C2, C3
S1 to S300
STHR,
STHL
R,/L
CLK1 to CLK3
MODE
CX
TEST
VDD1
VDD2
VSS1
VSS2
VSS3
Pin Name
Description
Video signal input
These pins are input video signals R,G, and B.
Video signal output
These pins are output video signals, which have been sampled and hold.
The relationship between the video signal input (C1, C2, C3) and video signal output is
shown below.
C1: S3n-2 (n = 1, 2, ··········100)
C2: S3n-1
C3: S3n
Cascade I/O
These pins are inputs/outputs for the start pulse for sample and hold timing.
High level of STHR/STHL is read at rising edge of CLK and start sampling video
signal. STHR serves as the input pin and STHL serves as output pin for the right shift.
For left shift, STHL serves as the input pins and STHR serves as the output pin.
Shift direction switching
input
The shift directions of the shift registers are as follows.
R,/L = H: STHR input, S1 → S300, STHL output.
R,/L = L: STHL input, S300 → S1, STHR output.
Shift clock input
The start pulse is read at rising edge of CLK. The sampling pulse SHPn is generated
at rising edge of CLK. For details, refer to 6. TIMING CHART.
The relationship between the clocks and the output pins is shown below.
(1) When MODE = L or open (sequential sampling)
CLK1 R,/L = H: S3n-2
R,/L = L: S3n
CLK2
:S3n-1
CLK3 R,/L = H: S3n
R,/L = L: S3n-2
(1) When MODE = H (simultaneous sampling)
CLK1: S3n-2, S3n-1, S3n (n = 1,2,·····100)
CLK2: Connect VDD1 or VSS1
CLK3: Connect VDD1 or VSS1
Mode select signal input
pin
This pin is used to select whether the three analog input signals, C1, C2, and C3 are
sampled simultaneously or sequentially (This pin is pulled down in the IC).
MODE = H: Simultaneous sampling
MODE = L or open: Sequential sampling
Hold capacitance control Two Sample & hold circuits are switched.
input
CX = H S&H1: Sampling, S&H2: Output
CX = L S&H1: Output, S&H2: Sampling
Test pin
Fix this pin to the L level.
Logic power supply
3.0 to 5.5 V
Driver power supply
5.0 V ± 0.5 V
Logic ground
Grounding
Driver ground
Grounding
Sample & hold ground It is ground of Sample & hold capacitance. Supply this terminal with the stable GND.
4
Data Sheet S14606EJ1V0DS