HD74LV373A Datasheet, PDF (6/11 Pages) Hitachi Semiconductor – Octal D-type Transparent Latches with 3-state Outputs

HD74LV373A
Output-skew Characteristics
Ta = 25°C
Ta = –40 to 85°C
C_L = 50 pF
Item
Symbol V_CC = (V)
Min
Max
Min
Max
Unit
Output skew
t_{sk (O)}
2.3 to 2.7
—
3.0 to 3.6
—
2.0
—
1.5
—
2.0
ns
1.5
4.5 to 5.5
—
1.0
—
1.0
Note: Skew between any outputs of the same package switching in the same direction. This parameter is warranted
but not production tested.
Operating Characteristics
Ta = 25°C
C_L = 50 pF
Item
Symbol V_CC = (V) _Min
Typ
Max
Unit Test Conditions
Power dissipation capacitance C_PD
3.3
—
16.6
—
pF
f = 10 MHz
5.0
—
18.2
—
Noise Characteristics
Item
Quiet output, maximum
dynamic V_OL
Quiet output, minimum
dynamic V_OL
Quiet output, minimum
dynamic V_OH
High-level dynamic input
voltage
Low-level dynamic input
voltage
Symbol V_CC = (V)
V_{OL (P)}
3.3
Ta = 25°C
Min
Typ
—
0.6
V_{OL (V)}
3.3
—
–0.6
V_{OH (V)}
3.3
—
2.9
V_{IH (D)}
3.3
2.31
—
V_{IL (D)}
3.3
—
—
Max
0.8
–0.8
—
—
0.99
C_L = 50 pF
Unit Test Conditions
V
V
V
V
V
Test Circuit
Output
1 kΩ _S2
C_L
OPEN
GND
V_CC
TEST
t_PLH /t_PHL
t_ZH/t _HZ
t_ZL /t _LZ
S2
OPEN
GND
V_CC
Note: C_L includes the probe and jig capacitance.
Rev.2.00 Jun. 25, 2004 page 6 of 10