HD74LV2GT245A Datasheet, PDF (6/10 Pages) Renesas Technology Corp – Dual Bus Transceivers with 3-state Outputs / CMOS Logic Level Shifter

HD74LV2GT245A
Switching Characteristics
• V_CC = 3.3 ± 0.3 V
Item
Symbol
Propagation t_PLH
delay time t_PHL
Enable time t_ZH
t_ZL
Disable time t_HZ
t_LZ
T_a = 25°C
Min Typ
— 6.0
— 8.0
— 8.0
— 10.0
— 9.5
— 14.0
Max
8.5
12.0
13.5
17.0
16.5
20.0
T_a = –40 to 85°C
Test
FROM
Min Max ^{Unit Conditions (Input)}
1.0 10.0 ns C_L = 15 pF A or B
1.0 13.5
C_L = 50 pF
1.0 15.5 ns C_L = 15 pF OE
1.0 19.0
C_L = 50 pF
1.0 19.5 ns C_L = 15 pF OE
1.0 22.0
C_L = 50 pF
TO
(Output)
B or A
A or B
A or B
• V_CC = 5.0 ± 0.5 V
Item
Symbol
Propagation t_PLH
delay time t_PHL
Enable time t_ZH
t_ZL
Disable time t_HZ
t_LZ
T_a = 25°C
Min Typ
— 4.3
— 5.6
— 5.7
— 7.0
— 7.8
— 10.9
Max
5.5
7.5
8.5
10.6
12.8
14.7
T_a = –40 to 85°C
Test
FROM
Min Max ^{Unit Conditions (Input)}
1.0 6.5 ns C_L = 15 pF A or B
1.0 8.5
C_L = 50 pF
1.0 10.0 ns C_L = 15 pF OE
1.0 12.0
C_L = 50 pF
1.0 14.2 ns C_L = 15 pF OE
1.0 16.0
C_L = 50 pF
TO
(Output)
B or A
A or B
A or B
Operating Characteristics
• C_L = 50 pF
Item
Power dissipation
capacitance
Symbol
C_PD
T_a = 25°C
V_CC (V) _Min
Typ
5.0
—
25.0
Max ^Unit
—
pF
Test Conditions
f = 10 MHz
Rev.2.00, Oct.23.2003, page 6 of 9