HD74HC590 Datasheet, PDF (6/10 Pages) Hitachi Semiconductor – 8-bit Binary Counter/Register (with 3-state outputs)

HD74HC590
Test Circuit
VCC
Input
Pulse Generator
Zout = 50 Ω
Input
Pulse Generator
Zout = 50 Ω
VCC
Output
QA to QH
CCKEN
CCK
Output
CCLR _RCO
RCK
G
Note : 1. C_L includes probe and jig capacitance.
1 k Ω _S1
C_L = 50 pF
OPEN
GND
V_CC
1 k Ω _S1
C_L = 50 pF
TEST
t_PLH / t _PHL
t_ZH/ t _HZ
t_ZL / t _LZ
OPEN
GND
V_CC
S1
OPEN
GND
V_CC
Waveforms
• Waveform – 1 (CCK to RCO)
tr
tf
90 %
V_CC
Input CCK
50 % 50 %
50 %
10 %
tw(H)
10 %
tw(L)
0V
t_PHL
t_PLH
90 %
90 %
V_OH
Output RCO
50 %
50 %
10 %
10 %
V_OL
t_THL
t_TLH
Note : 1. Input waveform : PRR ≤ 1 MHz, duty cycle 50%, t_r ≤ 6 ns, t_f ≤ 6 ns
• Waveform – 2 (CCLR to RCO, CCLR to CCK)
t_f
t_r
Input D
90 %
50 %
90 %
V_CC
50 %
10 %
10 %
0V
t_W
t_PLH
90 %
V_OH
Output RCO
50 %
10 %
t_TLH
V_OL
t_rem
90 %
V_OH
Output CCK
50 %
10 %
V_OL
t_TLH
Note : 1. Input waveform : PRR ≤ 1 MHz, duty cycle 50%, t_r ≤ 6 ns, t_f ≤ 6 ns
Rev.2.00 Mar 30, 2006 page 6 of 9