HD74HC175_15 Datasheet, PDF (6/9 Pages) Renesas Technology Corp – Quad. D-type Flip-Flops (with Clear)

HD74HC175
Switching Characteristics
Item
Maximum clock
frequency
Propagation delay
time
Setup time
Hold time
Removal time
Pulse width
Output rise/fall
time
Input capacitance
Symbol V_CC (V)
f_max
2.0
4.5
6.0
t_PLH, t_PHL 2.0
4.5
6.0
2.0
4.5
6.0
t_su
2.0
4.5
6.0
t_h
2.0
4.5
6.0
t_rem
2.0
4.5
6.0
t_w
2.0
4.5
6.0
t_TLH, t_THL 2.0
4.5
6.0
Cin
—
Ta = 25°C
Min Typ Max
—— 6
— — 30
— — 35
— — 150
— 14 30
— — 26
— — 185
— 14 37
— — 31
100 — —
20 3 —
17 – —
5 ——
5 –1 —
5 ——
100 — —
20 –1 —
17 — —
80 — —
16 9 —
14 — —
— — 75
— 5 15
— — 13
— 5 10
(C_L = 50 pF, Input t_r = t_f = 6 ns)
Ta = –40 to +85°C
Min Max Unit
Test Conditions
—
5 MHz
—
24
—
28
—
190 ns Clock to Q or Q
—
38
—
33
—
230 ns Clear to Q or Q
—
46
—
39
125
—
ns Data to Clock
25
—
21
—
5
—
ns Clock to Data
5
—
5
—
125
—
ns Clear to Clock
25
—
21
—
100
—
ns Clock, Clear
20
—
17
—
—
95
ns
—
19
—
16
—
10 pF
Test Circuit
Measurement point
C_L*
Note: C_L includes the probe and fig capacitance.
Rev.3.00, Jan 31, 2006 page 4 of 6