RX64M Datasheet, PDF (57/67 Pages) Renesas Technology Corp – MCUs

Under development ^{Preliminary document}
Specifications in this document are tentative and subject to change.
RX64M Group
1. Overview
Table 1.9
List of Pin and Pin Functions (100-Pin TFLGA) (1/4)
Pin
Number
100-Pin
TFLGA
Power Supply
Clock System
Control
I/O Port
A1
P05
A2
AVCC1
A3
P07
Bus
EXDMAC
SDRAMC
Timer
(MTU, GPTA, TPU,
TMR, PPG, RTC,
CMTW, POE, CAC)
Communication
(ETHERC, SCIg,
SCIh, RSPI, RIIC,
CAN, USB, SSI)
Memory Interface
Camera Interface
(QSPI, SDHI,
MMCIF, PDC)
S12ADC,
Interrupt R12DA
IRQ13 DA1
IRQ15 ADTRG0#
A4
VREFL0
A5
P43
A6
PD0
A7
PD4
A8
A9
A10
B1
EMLE
B2
AVSS0
B3
AVCC0
B4
B5
B6
B7
PE0
PE1
PE2
P40
P44
PD1
PD3
B8
PD6
B9
PD7
B10
PE3
C1
VCL
C2
AVSS1
C3
PJ3
C4
VREFH0
C5
P42
C6
P47
C7
PD2
D0[A0/D0]
D4[A4/D4]
GTIOC1B-E/POE4#
MTIOC8B/POE11#
D8[A8/D8]
D9[A9/D9]
D10[A10/
D10]
MTIOC3D/GTIOC2B-
A
MTIOC4C/MTIOC3B/
GTIOC1B-A/PO18
MTIOC4A/GTIOC0B-
A/PO23/TIC3
SCK12
TXD12/SMOSI12/
SSDA12/TXDX12/
SIOX12
RXD12/SMISO12/
SSCL12/RXDX12
MMC_CMD-B/
SDHI_CMD-B/
QSSL-B
MMC_D4-B
IRQ11-
DS
IRQ0
IRQ4
AN003
AN108
AN112
ANEX0
MMC_D5-B
ANEX1
MMC_D6-B
IRQ7-DS AN100
D1[A1/D1]
D3[A3/D3]
MTIOC4B/GTIOC1A-
E/POE0#
MTIOC8D/GTIOC0A-
E/POE8#/TOC2
CTX0
D6[A6/D6]
MTIC5V/MTIOC8A/
POE4#
IRQ8-DS AN000
IRQ12-
DS
AN004
IRQ1
AN109
MMC_D3-B/
SDHI_D3-B/
QIO3-B
IRQ3
MMC_D0-B/
SDHI_D0-B/
QIO0-B/QMO-B
IRQ6
AN111
AN106
D7[A7/D7] MTIC5U/POE0#
MMC_D1-B/
SDHI_D1-B/
QIO1/QMI-B
IRQ7
AN107
D11[A11/
D11]
MTIOC4B/GTIOC2A- CTS12#/RTS12#/
A/PO26/POE8#/TOC3 SS12#/ET0_ERXD3
MMC_D7-B
AN101
EDACK1
MTIOC3C
ET0_EXOUT/CTS6#/
RTS6#/CTS0#/RTS0#/
SS6#/SS0#
D2[A2/D2]
MTIOC4D/GTIOC0B- CRX0
E/TIC2
MMC_D2-B/
SDHI_D2-B/
QIO2-B
IRQ10-
DS
IRQ15-
DS
IRQ2
AN002
AN007
AN110
R01DS0173EJ0090 Rev.0.90
Feb 28, 2014
Page 57 of 67