R2A20150NP Datasheet, PDF (5/11 Pages) Renesas Technology Corp – 8-bit I/O Expander for I2C BUS (Corresponds to Fast mode)

R2A20150NP/SA
New Product
Functional Blocks
 I²C BUS Interface
The I²C BUS interface recognizes start/stop conditions, a slave address and a write/read mode selection
by receiving SDA,SCL,CS0,CS1 and CS2 signals and then the latch pulse, dedicated to each data latch
are generated.
 Data Latch
This IC has 3 types of data latch: the I/O setting data latch, the input data latch and the output data latch
and each latch is controlled by the I²C BUS interface.
 I/O setting data latch
These latches set input-state or output-state of each parallel data terminals (D0 to D7). They are
set at the next byte after receiving the slave address byte in the write mode from the master.
In case this latch is set to high, the data is transferred from the I²C BUS interface to the parallel
data terminals. In the opposite transmission: from the parallel data terminals to the I²C BUS,
it is set to low.
 Output data latch
In the write mode, the data from the I²C BUS to the parallel data terminals is latched.
When the master transmits output data after a setting in write mode, the output data is taken into
the latch.
 Input data latch
In the read mode, the data of parallel data terminals is latched in the input data latches. The input
data is taken into the latches from the parallel data terminals on every 8th negative edge of SCL clock.
The latched data is output to the master through the sift resistor. On the output terminal assigned by
the I/O setting latch, the input data latch takes the state of the output terminal.
 Parallel Input/Output Port
In case I/O setting latch is set to low (the input mode), each parallel terminal becomes hi-impedance
and is able to accept an input. In another case I/O setting latch is set to high (output mode), each parallel
terminal output a data according to the state of the output data latch.
 Serial Output Port
The parallel data from each parallel terminal are conversion to 8bit serial data and output to SO terminal.
Without serial output mode, SO terminal goes to low output.
 Power on Reset
When the power is turned on, each latch is reset (initialize) and then the parallel data I/O terminals
become hi-impedance (input mode).
R03DS0012EJ0100 Rev.1.00
2011.09.05
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