HD74LS00 Datasheet, PDF (5/6 Pages) Hitachi Semiconductor – QUADRUPLE 2-INPUT POSITIVE-NAND GATES

HD74LS00
JEITA Package Code
P-SOP14-3.95x8.65-1.27
RENESAS Code
PRSP0014DE-A
Previous Code
FP-14DNV
MASS[Typ.]
0.13g
*1 _D
14
8
NOTE)
F
1. DIMENSIONS"*1 (Nom)"AND"*2"
DO NOT INCLUDE MOLD FLASH.
2. DIMENSION"*3"DOES NOT
INCLUDE TRIM OFFSET.
Index mark
1
Z
e
7
*3 _bp
xM
y
bp
Terminal cross section
( Ni/Pd/Au plating )
L1
Detail F
θ
L
Reference
Symbol
D
E
A2
A1
A
bp
b1
c
c1
θ
HE
e
x
y
Z
L
L1
Dimension in Millimeters
Min
Nom Max
8.65
9.05
3.95
0.10
0.14
0.25
1.75
0.34
0.40
0.46
0.15
0.20
0.25
0°
8°
5.80
6.10
6.20
1.27
0.25
0.15
0.635
0.40
0.60
1.27
1.08
Rev.2.00, Feb.18.2005, page 5 of 5