HD49351BP_15 Datasheet, PDF (5/31 Pages) Renesas Technology Corp – CDS/PGA & 10-bit A/D TG Converter

HD49351BP/HBP
Pin Description (cont.)
BGA
Pin No.
A8
A9
A10
B10
B9
C10
C9
D9
D10
E9
PAD
No.
30
31
32
33
34
35
36
37
38
39
E10
40
F9
41
F10
42
G9
43
H9
44
G10
45
H10
46
K10
47
J10
48
J9
49
K9
50
K8
51
J8
52
K7
53
K6
54
J7
55
J6
56
J5
57
K5
58
J4
59
K4
60
J3
61
J2
62
K3
63
K2
64
Symbol
XV1
XV2
XV3
XV4
CH1
CH2
CH3
CH4
XSUB
SUB_SW
SUB_PD
STROB
DVss3
AVss
ADC_in
BIAS
VRB
VRT
VRM
Avdd
BLK_C
CDS_in
AVdd
BLKFB
BLKSH
AVss
Test2
Test1
DLL_C
Dvdd1
MON
41cont
CDS_CS
SDATA
SCK
Description
V.CCD transfer pulse output-1
V.CCD transfer pulse output-2
V.CCD transfer pulse output-3
V.CCD transfer pulse output-4
Read out pulse output-1
Read out pulse output-2
Read out pulse output-3
Read out pulse output-4
Pulse output for electronic shutter
SUB voltage control output-1. Input the ADCK when 61 pin
is Hi
SUB voltage control output-2
Flash control output. Input Vgate at Hi of 61pin
General ground for TG (0 V)
Analog ground (0 V)
A/D converter input pin
Bias standard resistance (33 kΩ for Gnd)
ADC bottom standard voltage (0.1 µF for Gnd)
ADC top standard voltage (0.1 µF for Gnd)
ADC middle standard voltage (0.1 µF for Gnd)
Analog power supply (3 V)
Black level C pin (1000pF for Gnd)
CDS input pin
Analog power supply (3 V)
Black level FB pin (1 µF between BLKFB and BLKSH)
Black level S/H pin
Analog ground (0 V)
H: Normal operation, L: CDS single operation mode
Input 36; PBLK at testing, Input 37; OBP, Input 38; CPDM,
Input 39; ADCLK, Input 40; SP2, Input 41; SP1
L: Slave mode, H: Master mode
Analog delay DLL external C pin (100 pF for Gnd)
Digital power supply (3 V) CDS, PAG, ADC part
Pulse monitor (SP1, SP2, ADCLK, OBP, CPDM, PBLK
output)
Input STROB = pin 41, Input SUB_SW = pin 39 at Low
Input Vgate = pin 41, Input ADCK = pin 39 at Hi
Serial data CS at CDS part
Input serial data
Input serial clock
Analog(A) or
I/O Digital(D)
Remarks
OD
2 mA/10 pF
OD
2 mA/10 pF
OD
2 mA/10 pF
OD
2 mA/10 pF
OD
2 mA/10 pF
OD
2 mA/10 pF
OD
2 mA/10 pF
OD
2 mA/10 pF
OD
2 mA/10 pF
I/O D
2 mA/10 pF
OD
I/O D
—D
—A
IA
—A
—A
—A
—A
—A
—A
IA
—A
IA
OA
—A
ID
2 mA/10 pF
2 mA/10 pF
ID
OA
—D
OD
ID
ID
ID
ID
2 mA/10 pF
Rev.1.0, Jul 06, 2004, page 3 of 28