HAT2129H Datasheet, PDF (5/8 Pages) Renesas Technology Corp – Silicon N Channel Power MOS FET Power Switching

HAT2129H
Reverse Drain Current vs.
Source to Drain Voltage
50
10 V
40
5V
30
V_GS = 0.5 V
20
10
Pulse Test
0
0.4 0.8 1.2 1.6 2.0
Source to Drain Voltage V_SD (V)
Maximum Avalanche Energy vs.
Channel Temperature Derating
50
I_AP = 20 A
40
V_DD = 15 V
duty < 0.1 %
Rg ≥ 50 Ω
30
20
10
0
25 50 75 100 125 150
Channel Temperature Tch (°C)
Normalized Transient Thermal Impedance vs. Pulse Width
3
1
D=1
Tc = 25°C
0.5
0.3
0.2
0.1 _0.1
0.05
0.03
0.01
0.02
0.01
1shot
pulse
10 µ
100 µ
θch – c(t) = γs (t) • θch – c
θch – c = 6.25°C/ W, Tc = 25°C
P_DM
D=
PW
T
PW
T
1m
10 m
100 m
1
10
Pulse Width PW (s)
Vin
15 V
Avalanche Test Circuit
V_DS
Monitor
Rg
50 Ω
L
I_AP
Monitor
D. U. T
V_DD
Avalanche Waveform
E_AR =
1
2
L • I_AP2 •
V_DSS
V_DSS – V_DD
I_AP
I_D
V_(BR)DSS
V_DS
V_DD
0
Rev.5.00 Sep 20, 2005 page 5 of 7