3802 Datasheet, PDF (5/52 Pages) Renesas Technology Corp – SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER

MITSUBISHI MICROCOMPUTERS
3802 Group
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER
PIN DESCRIPTION
Pin
VCC, VSS
Name
Power source
Function
• Apply voltage of 3.0 V–5.5 V to VCC, and 0 V to VSS.
(Extended operating temperature version : 4.0 V to 5.5 V)
Function except a port function
CNVSS
CNVSS
• This pin controls the operation mode of the chip.
• Normally connected to VSS.
• If this pin is connected to VCC, the internal ROM is inhibited and external memory is accessed.
VREF
Analog reference • Reference voltage input pin for A-D and D-A converters
voltage
AVSS
Analog power
source
• GND input pin for A-D and D-A converters
• Connect to VSS.
RESET
Reset input
• Reset input pin for active “L”
XIN
XOUT
Clock input
Clock output
• Input and output signals for the clock generating circuit.
• Connect a ceramic resonator or quartz-crystal oscillator between the XIN and XOUT pins to set the
oscillation frequency.
• If an external clock is used, connect the clock source to the XIN pin and leave the XOUT pin open.
• The clock is used as the oscillating source of system clock.
P00–P07
P10–P17
P20–P27
P30/DA1,
P31/DA2
I/O port P0
I/O port P1
I/O port P2
I/O port P3
• 8 bit CMOS I/O port
• I/O direction register allows each pin to be individually programmed as either input or output.
• At reset this port is set to input mode.
• In modes other than single-chip, these pins are used as address, data, and control bus I/O pins.
• CMOS compatible input level
• CMOS 3-state output structure
• D–A conversion output pins
P32–P37
P40/INT4,
P41/INT0,
P42/INT1,
P43/INT2
I/O port P4
• 8-bit CMOS I/O port with the same function as port P0 • External interrupt input pin
• CMOS compatible input level
• CMOS 3-state output structure
P44/RXD,
P45/TXD,
P46/SCLK1,
P47/SRDY1
• Serial I/O1 I/O pins
P50/SIN2,
P51/SOUT2,
P52/SCLK2,
P53/SRDY2
I/O port P5
• 8-bit CMOS I/O port with the same function as port P0 • Serial I/O2 I/O pins
• CMOS compatible input level
• CMOS 3-state output structure
P54/CNTR0,
P55/CNTR1
• Timer X and Timer Y I/O pins
P56/PWM
• PWM output pin
P57/INT3
• External interrupt input pin
P60/AN0–
P67/AN7
I/O port P6
• 8-bit CMOS I/O port with the same function as port P0 • A-D conversion input pins
• CMOS compatible input level
• CMOS 3-state output structure
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