2SK2934 Datasheet, PDF (5/8 Pages) Hitachi Semiconductor – Silicon N Channel MOS FET High Speed Power Switching

2SK2934
Reverse Drain Current vs.
Source to Drain Voltage
20
Pulse Test
16
12 ^{10 V} _{5 V}
Maximum Avalanche Energy vs.
Channel Temperature Derating
40
I _AP = 20 A
32
V_DD = 25 V
duty < 0.1 %
Rg > 50 Ω
24
8
16
V_GS = 0, –5 V
4
8
0
0.4 0.8 1.2 1.6 2.0
Source to Drain Voltage V_SD (V)
0
25 50 75 100 125 150
Channel Temperature Tch (°C)
Normalized Transient Thermal Impedance vs. Pulse Width
3
1
D=1
Tc = 25°C
0.5
0.3
0.2
0.1 _0.1
0.05
0.03
0.02
0.011shot
pulse
0.01
10 µ
100 µ
θ_{ch – c(t) =} γ _{s (t) •} θ _{ch – c}
θ_{ch – c = 6.25°C/W, Tc = 25°C}
PDM
PW
T
D=
PW
T
1m
10 m
100 m
1
10
Pulse Width PW (S)
Vin
15 V
Avalanche Test Circuit
V_DS
Monitor
Rg
L
I_AP
Monitor
D. U. T
V_DD
50 Ω
Avalanche Waveform
1
E_AR = ₂
• L • I_AP2 •
V_DSS
V_DSS – V_DD
I_AP
I_D
V_(BR)DSS
V_DS
V_DD
0
Rev.4.00 Sep 07, 2005 page 5 of 7