V850E2 Datasheet, PDF (48/88 Pages) Renesas Technology Corp – 32-bit Single-Chip Microcontroller

Chapter 7
7.7.2 MEMC0CLK synchronous timing
Parameter
Symbol
Condition
Bus operational period
Delay time from MEMC0CLK (r) to
address
Delay time from MEMC0CLK (r) to
address float
Delay time from MEMC0CLK (r) to
ASTB (f)
Delay time from MEMC0CLK (r) to
MEMC0RDZ and MEMC0WRZ
Data input setup time
(from MEMC0CLK (r))
Data input hold time
(from MEMC0CLK (r))
Data output delay time
(from MEMC0CLK (r))
MEMC0WAITZ setup time
(to MEMC0CLK (r))
MEMC0WAITZ hold time
(from MEMC0CLK (r))
T
tDKA
<18>
tFKA <19>
tDKST <20>
tDKRDWR <21>
tSIDK <22>
tHKID <23>
tDKOD
tSWTK
tHKWT
<24>
<25> B0VDD≥3.5V
<25> B0VDD<3.5V
<26>
Peripherals specification
Ratings
Unit
Min Typ Max
25 -
- ns
0
- 12 ns
0
- 12 ns
0
- 11 ns
-2.5 -
6 ns
10 -
- ns
2.5 -
- ns
-
- 11 ns
23 -
27 -
- ns
- ns
2.5 -
- ns
R01DS0141ED0100
48
Data Sheet