RJK1028DNS_13 Datasheet, PDF (4/7 Pages) Renesas Technology Corp – 100V, 4A, 165m max. Silicon N Channel Power MOS FET Power Switching

RJK1028DNS
Static Drain to Source On State Resistance
vs. Temperature
500
Pulse Test
I_D = 2 A
400
300
V_GS = 4.5 V
200
100
10 V
0
–25 0 25 50 75 100 125 150
Case Temperature Tc (°C)
Dynamic Input Characteristics
80
12
I_D = 4 A
V_GS
60
V_DS
40
9
V_DD = 50 V
25 V
10 V ₆
20
V_DD = 50 V
3
25 V
10 V
0
0
0
2
4
6
8 10
Gate Charge Qg (nc)
Maximum Avalanche Energy vs.
Channel Temperature Derating
0.5
I_AP = 2 A
0.4
V_DD = 50 V
duty < 0.1%
Rg ≥ 50 Ω
0.3
0.2
0.1
0
25 50 75 100 125 150
Channel Temperature Tch (°C)
Preliminary
1000
Typical Capacitance vs.
Drain to Source Voltage
300
Ciss
100
30
10
Coss
Crss
3 _{VGS = 0}
f = 1 MHz
1
0
20 40 60 80 100
Drain to Source Voltage V_DS (V)
Reverse Drain Current vs.
Source to Drain Voltage
10
Pulse Test
8
6
10 V
5V
4
2
V_GS = 0, –5 V
0
0.4 0.8 1.2 1.6 2.0
Source to Drain Voltage V_SD (V)
R07DS0195EJ0400 Rev.4.00
Apr 11, 2013
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