RJK0366DPA-02 Datasheet, PDF (4/7 Pages) Renesas Technology Corp – Silicon N Channel Power MOS FET Power Switching

RJK0366DPA-02
Static Drain to Source On State Resistance
vs. Temperature
25
Pulse Test
20
I_D = 2 A, 5 A, 10 A
15
V_GS = 4.5 V
10
5
10 V
2 A, 5 A, 10 A
0
–25 0 25 50 75 100 125 150
Case Temperature Tc (°C)
Dynamic Input Characteristics
50
20
I_D = 25 A _VGS
40
30
V_DS
16
V_DD = 25 V
10 V
12
20
8
10
4
V_DD = 25 V
10 V
0
0
0
10 20 30 40 50
Gate Charge Qg (nc)
Maximum Avalanche Energy vs.
Channel Temperature Derating
20
16
12
8
4
0
25 50 75 100 125 150
Channel Temperature Tch (°C)
Preliminary
10000
Typical Capacitance vs.
Drain to Source Voltage
3000
Ciss
1000
300
Coss
100
Crss
30 _{VGS = 0}
f = 1 MHz
10
0
10
20
30
Drain to Source Voltage V_DS (V)
Reverse Drain Current vs.
Source to Drain Voltage
50
10 V
40
5V
Pulse Test
30
20
10
V_GS = 0, –5 V
0
0.4 0.8 1.2 1.6 2.0
Source to Drain Voltage V_SD (V)
REJ03G1939-0110 Rev.1.10
May 21, 2010
Page 4 of 6