RJK0204DPA Datasheet, PDF (4/7 Pages) Renesas Technology Corp – Silicon N Channel Power MOS FET with Schottky Barrier Diode Power Switching

RJK0204DPA
Static Drain to Source On State Resistance
vs. Temperature
10
Pulse Test
8
6
I_D = 5 A, 10 A, 20 A
4 _{VGS = 4.5 V}
2
10 V
5 A, 10 A, 20 A
0
–25 0 25 50 75 100 125 150
Case Temperature Tc (°C)
Dynamic Input Characteristics
50
I_D = 50 A
20
V_GS
40
V_DD = 20 V
16
10 V
30
12
V_DS
20
8
10
V_DD = 20 V
4
10 V
0
0
0
20 40 60 80 100
Gate Charge Qg (nc)
Maximum Avalanche Energy vs.
Channel Temperature Derating
100
I_AP = 21 A
V_DD = 15 V
80
duty < 0.1%
Rg ≥ 50 Ω
60
40
20
0
25 50 75 100 125 150
Channel Temperature Tch (°C)
Preliminary
10000
Typical Capacitance vs.
Drain to Source Voltage
3000
1000
300
100
Ciss
Coss
Crss
30 _{VGS = 0}
f = 1 MHz
10
0
5
10
15 20 25
Drain to Source Voltage V_DS (V)
Reverse Drain Current vs.
Source to Drain Voltage
100
10 V
5V
80
Pulse Test
60
40
V_GS = 0, –5 V
20
0
0.4 0.8 1.2 1.6 2.0
Source to Drain Voltage V_SD (V)
REJ03G1922-0210 Rev.2.10
Apr 27, 2010
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