NP90N04VDG Datasheet, PDF (4/10 Pages) Renesas Technology Corp – MOS FIELD EFFECT TRANSISTOR

NP90N04VDG
ELECTRICAL CHARACTERISTICS (TA = 25°C)
CHARACTERISTICS
SYMBOL
TEST CONDITIONS
Zero Gate Voltage Drain Current
Gate Leakage Current
Gate to Source Threshold Voltage
Forward Transfer Admittance ^Note
Drain to Source On-state Resistance ^Note
IDSS
IGSS
VGS(th)
| yfs |
RDS(on)1
VDS = 40 V, VGS = 0 V
VGS = ±20 V, VDS = 0 V
VDS = VGS, ID = 250 μA
VDS = 5 V, ID = 45 A
VGS = 10 V, ID = 45 A
RDS(on)2
VGS = 4.5 V, ID = 35 A
Input Capacitance
Ciss
VDS = 25 V,
Output Capacitance
Coss
VGS = 0 V,
Reverse Transfer Capacitance
Crss
f = 1 MHz
Turn-on Delay Time
td(on)
VDD = 20 V, ID = 45 A,
Rise Time
tr
VGS = 10 V,
Turn-off Delay Time
td(off)
RG = 0 Ω
Fall Time
tf
Total Gate Charge
QG
VDD = 32 V,
Gate to Source Charge
QGS
VGS = 10 V,
Gate to Drain Charge
Body Diode Forward Voltage ^Note
QGD
VF(S-D)
ID = 90 A
IF = 90 A, VGS = 0 V
Reverse Recovery Time
Reverse Recovery Charge
Note Pulsed test
trr
IF = 90 A, VGS = 0 V,
Qrr
di/dt = 100 A/μs
MIN. TYP. MAX. UNIT
1
μA
±100 nA
1.4
2.5 V
30 67
S
3.2 4.0 mΩ
4.3 8.6 mΩ
4600 6900 pF
480 720 pF
310 560 pF
17 34 ns
13 33 ns
74 148 ns
8
20 ns
90 135 nC
13
nC
26
nC
0.9 1.5 V
40
ns
39
nC
TEST CIRCUIT 1 AVALANCHE CAPABILITY
TEST CIRCUIT 2 SWITCHING TIME
D.U.T.
RG = 25 Ω
L
PG.
50 Ω
VDD
VGS = 20 → 0 V
BVDSS
IAS
ID
VDD
VDS
Starting Tch
TEST CIRCUIT 3 GATE CHARGE
D.U.T.
RG
PG.
VGS
0
τ
τ = 1 μs
Duty Cycle ≤ 1%
RL
VDD
VGS
VGS
Wave Form
10%
0
VDS
90%
VDS
VDS
0
Wave Form
td(on)
VGS
90%
90%
10% 10%
tr td(off) tf
ton
toff
D.U.T.
IG = 2 mA
RL
PG.
50 Ω
VDD
2
Data Sheet D19791EJ1V0DS