NP80N06DLD_15 Datasheet, PDF (4/6 Pages) Renesas Technology Corp – SWITCHING N-CHANNEL POWER MOS FET INDUSTRIAL USE

NP80N06CLD,NP80N06DLD,NP80N06ELD
ELECTRICAL CHRACTERISTICS (TA = 25 °C)
CHARACTERISTICS
SYMBOL
TEST CONDITIONS
Drain to Source On-state Resistance
RDS(on)1 VGS = 10 V, ID = 40 A
RDS(on)2 VGS = 5 V, ID = 40 A
RDS(on)3 VGS = 4 V, ID = 40 A
Gate to Source Cut-off Voltage
VGS(off) VDS = 10 V, ID = 250 µA
Forward Transfer Admittance
| yfs | VDS = 10 V, ID = 40 A
Drain Leakage Current
IDSS
VDS = 60 V, VGS = 0 V
Gate to Source Leakage Current
IGSS
VGS = ±20 V, VDS = 0 V
Input Capacitance
Ciss
VDS = 25 V, VGS = 0 V, f = 1 MHz
Output Capacitance
Coss
Reverse Transfer Capacitance
Crss
Turn-on Delay Time
td(on)
ID = 40 A, VGS(on) = 10 V, VDD = 30 V,
Rise Time
tr
RG = 10 Ω
Turn-off Delay Time
td(off)
Fall Time
tf
Total Gate Charge 1
QG1
ID = 80 A, VDD = 48 V, VGS = 10 V
Total Gate Charge 2
QG2
ID = 80 A, VDD = 48 V, VGS = 5 V
Gate to Source Charge
QGS
Gate to Drain Charge
QGD
Body Diode Forward Voltage
VF(S-D) IF = 80 A, VGS = 0 V
Reverse Recovery Time
trr
IF = 80 A, VGS = 0 V, di/dt = 100 A/µs
Reverse Recovery Charge
Qrr
MIN. TYP. MAX. UNIT
9.7 13 mΩ
12 17 mΩ
14 20 mΩ
1.0 1.5 2.0 V
15 53
S
10 µA
±10 µA
2360 3540 pF
490 730 pF
220 390 pF
66 150 ns
990 2500 ns
180 400 ns
450 1200 ns
60 90 nC
34 51 nC
10
nC
20
nC
0.94
V
55
ns
75
nC
TEST CIRCUIT 1 SWITCHING TIME
TEST CIRCUIT 2 GATE CHARGE
D.U.T.
RG
PG.
RG = 10 Ω
VGS
0
t
t = 1µ s
Duty Cycle ≤ 1 %
RL
VDD
VGS
VGS
Wave Form
0 ^{10 %}
VGS (on) ^{90 %}
ID
90 %
ID
ID
Wave Form
0 ^{10 %}
90 %
10 %
td (on)
tr
td (off)
tf
ton
toff
D.U.T.
IG = 2 mA
RL
PG.
50 Ω
VDD
2
Preliminary Product Information D13793EJ2V0PM00