HD74LS645 Datasheet, PDF (4/7 Pages) Hitachi Semiconductor – Octal Bus Transceivers(non-inverted 3-state outputs)

HD74LS645
Testing Method
Test Circuit
4.5V
Input
P.G.
Zout = 50Ω
V_CC
G
DIR
RL
Output
S1
1A ^S3
1B
5kΩ
S2
CL
Notes:
1. C_L includes prove and jig capacitance.
2. 2A-2B, 3A-3B, 4A-4B, 5A-5B, 6A-6B, 7A-7B, 8A-8B, are identical to abobe load circuit.
3. S₃ is a input-output switch.
4. All diodes are 1S2074(H).
Waveforms 1
Input A
(or B)
t_TLH
90 %
1.3 V
10 %
t_THL
3V
90 %
1.3 V
10 %
0V
t_PLH
Output B
(or A)
1.3 V
t_PHL
S₁, S₂ close
Note: Input pulse: t_TLH ≤ 15 ns, t_THL ≤ 6 ns, PRR = 1 MHz, duty cycle 50%
V_OH
1.3 V
V_OL
Rev.2.00, Feb.18.2005, page 4 of 6