HD74HC4060 Datasheet, PDF (4/7 Pages) Hitachi Semiconductor – 14-stage Binary Counter

HD74HC4060
Switching Characteristics (C_L = 50 pF, Input t_r = t_f = 6 ns)
Item
Maximum clock
frequency
Propagation delay
time
Removal time
Pulse width
Output rise/fall
time
Input capacitance
Symbol VCC (V)
fmax
2.0
4.5
6.0
tPLH
2.0
4.5
6.0
tPHL
2.0
4.5
6.0
tPHL
2.0
4.5
6.0
trem
2.0
4.5
6.0
tw
2.0
4.5
6.0
tTLH
2.0
tTHL
4.5
6.0
Cin
—
Ta = 25°C
Min Typ Max
—— 4
— — 20
— — 24
— — 300
— 42 60
— — 51
— — 300
— 41 60
— — 51
— — 240
— 16 48
— — 41
100 — —
20 10 —
17 — —
80 — —
16 7 —
14 — —
— — 75
—
5
15
— — 13
—
5
10
Ta = –40 to +85°C
Min
Max
—
3
—
16
—
19
—
375
—
75
—
63
—
375
—
75
—
63
—
300
—
60
—
51
125
—
25
—
21
—
100
—
20
—
17
—
—
95
—
19
—
16
—
10
Unit
MHz
Test Conditions
ns Clock to Q4
ns Clock to Q4
ns Reset to output
ns
ns
ns
pF
Test Circuit
VCC
VCC
Input
Pulse Generator
Zout = 50 Ω
Input
Pulse Generator
Zout = 50 Ω
Clock out1 _Q4
Clock out2
Clock in
Reset
Q₁₄
Output
Output
C_L = 50 pF
C_L = 50 pF
Note : 1. C_L includes probe and jig capacitance.
Rev.2.00 Mar 30, 2006 page 4 of 6