HD74HC4020 Datasheet, PDF (4/7 Pages) Hitachi Semiconductor – 14-stage Binary Counter

HD74HC4020
Switching Characteristics (C_L = 50 pF, Input t_r = t_f = 6 ns)
Item
Maximum clock
frequency
Propagation delay
time
Removal time
Pulse width
Output rise/fall
time
Input capacitance
Symbol VCC (V)
fmax
2.0
4.5
6.0
tPLH
2.0
tPHL
4.5
6.0
tPLH
2.0
tPHL
4.5
6.0
tPLH
2.0
tPHL
4.5
6.0
tPLH
2.0
tPHL
4.5
6.0
trem
2.0
4.5
6.0
tw
2.0
4.5
6.0
tTLH
2.0
tTHL
4.5
6.0
Cin
—
Ta = 25°C
Min Typ Max
—— 5
— — 25
— — 29
— — 175
— 14 35
— — 30
— — 175
— 14 35
— — 30
— — 200
— 18 40
— — 34
— — 100
— — 20
— — 17
100 — —
20 6 —
17 — —
80 — —
16 4 —
14 — —
— — 75
—
5
15
— — 13
—
5
10
Ta = –40 to +85°C
Min
Max Unit
Test Conditions
—
4 MHz
—
20
—
24
—
220 ns Clock to Q1
—
44
—
37
—
220 ns Clock to Q1
—
44
—
37
—
250 ns Reset to output
—
50
—
43
—
125
ns Qn to Qn – 1
—
25
—
21
125
—
ns
25
—
21
—
100
—
ns
20
—
17
—
—
95
ns
—
19
—
16
—
10
pF
Test Circuit
VCC
VCC
Input
Pulse Generator
Zout = 50 Ω
Input
Pulse Generator
Zout = 50 Ω
Clock
Q₁
Reset
Q₁₄
Output
Output
C_L = 50 pF
C_L = 50 pF
Note : 1. C_L includes probe and jig capacitance.
Rev.2.00 Mar 30, 2006 page 4 of 6