HD74HC280 Datasheet, PDF (4/6 Pages) Hitachi Semiconductor – 9-bit Odd/Even Parity Generator/Checker

HD74HC280
Test Circuit
VCC
Input
Pulse Generator
Zout = 50 Ω
VCC
Output
A
B
Σ
EVEN
C
D
E
Output
F
G
Σ
ODD
H
I
C_L = 50 pF
C_L = 50 pF
Note : 1. C_L includes probe and jig capacitance.
Waveforms
• Waveform – 1
t_r
t_f
90 %
90 %
V_CC
Input
50 %
50 %
10 %
10 %
0V
t_PLH
t_PHL
Same-phase
output
50 %
10 %
90 %
t_PHL ^tTLH
90 %
V_OH
50 %
10 %
V_OL
t_PLH
t_THL
Inverse-phase
output
90 %
50 %
10 %
t_THL
90 %
V_OH
50 %
10 %
V_OL
t_TLH
Note : 1. Input waveform : PRR ≤ 1 MHz, duty cycle 50%, t_r ≤ 6 ns, t_f ≤ 6 ns
Rev.2.00 Jan 31, 2006 page 4 of 5