HD74HC173 Datasheet, PDF (4/8 Pages) Hitachi Semiconductor – 4-bit D-type Register (with 3-state Outputs)

HD74HC173
Switching Characteristics
Item
Maximum clock
frequency
Propagation delay
time
Enable time
Disable time
Setup time
Removal time
Hold time
Pulse width
Output rise/fall
time
Input capacitance
Symbol V_CC (V)
f_max
2.0
4.5
6.0
t_PLH, t_PHL 2.0
4.5
6.0
t_PHL
2.0
4.5
6.0
t_ZH, t_ZL
2.0
4.5
6.0
t_HZ, t_LZ
2.0
4.5
6.0
t_su
2.0
4.5
6.0
t_rem
2.0
4.5
6.0
t_h
2.0
4.5
6.0
t_w
2.0
4.5
6.0
t_TLH, t_THL 2.0
4.5
6.0
Cin
—
Ta = 25°C
Min Typ Max
—— 5
— — 27
— — 32
— — 175
— 14 35
— — 30
— — 150
— 14 30
— — 26
— — 150
— 12 30
— — 26
— — 150
— 12 30
— — 26
100 — —
20 4 —
17 – —
90 — —
18 0 —
15 — —
5 ——
5 –2 —
5 ——
80 — —
16 4 —
14 — —
— — 60
— 4 12
— — 10
— 5 10
(C_L = 50 pF, Input t_r = t_f = 6 ns)
Ta = –40 to +85°C
Min
Max Unit
Test Conditions
—
4 MHz
—
21
—
25
—
220 ns Clock to Q
—
44
—
37
—
190 ns Clear to Q
—
38
—
33
—
190 ns
—
38
—
33
—
190 ns
—
38
—
33
125
—
ns
25
—
21
—
115
—
ns
23
—
20
—
5
—
ns
5
—
5
—
100
—
ns
20
—
17
—
—
75
ns
—
15
—
13
—
10 pF
Test Circuit
Output
1KΩ _S2
C_L
OPEN
GND
V_CC
TEST
t_PLH / t _PHL
t_ZH/ t _HZ
t_ZL / t _LZ
S2
OPEN
GND
V_CC
Note 1. C_L includes probe and jig capacitance
Rev.3.00, Jan 31, 2006 page 4 of 7