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HD74HC109 Datasheet, PDF (4/8 Pages) Hitachi Semiconductor – Dual J-K Flip-Flops (with Preset and Clear) | |||
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HD74HC109
Switching Characteristics (CL = 50 pF, Input tr = tf = 6 ns)
Item
Setup time
Hold time
Pulse width
Output rise/fall
time
Input capacitance
Symbol VCC (V)
tsu
2.0
4.5
6.0
th
2.0
4.5
6.0
tw
2.0
4.5
6.0
tTLH, tTHL 2.0
4.5
6.0
Cin
â
Ta = 25°C
Ta = â40 to +85°C
Min Typ Max Min Max Unit
Test Conditions
100 â â 125
â ns Data to Latch Enable
20 4 â
25
â
17 â â
21
â
0 ââ
0
â ns Latch Enable to Data
0 â4 â
0
â
0 ââ
0
â
80 â â 100
â ns Latch Enable
16 5 â
20
â
14 â â
17
â
â â 75
â
95 ns
â 5 15
â
19
â â 13
â
16
â 5 10
â
10 pF
Test Circuit
VCC
VCC
Input
Pulse generator
Zout = 50 â¦
Input
Pulse generator
Zout = 50 â¦
Preset
Output
J
Clock
Q
Output
CL = 50 pF
K
Q
Clear
CL = 50 pF
Note: CL includes the probe and jig capacitance.
Rev.2.00, Oct 11, 2005 page 4 of 7
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