HD74CBT1G125_06 Datasheet, PDF (4/7 Pages) Renesas Technology Corp – Single FET Bus Switch

HD74CBT1G125
Switching Characteristics
V_CC = 4.0 V
(Ta = −40 to 85°C)
Item
Symbol Min
Propagation delay time ^*1
t_PLH

t_PHL
Enable time
t_ZH

t_ZL
Disable time
t_HZ

t_LZ

Max
0.35
5.5
4.5
4.5
FROM
TO
Unit
Test conditions
(Input)
(Output)
ns C_L = 50 pF
R_L = 500 Ω
A or B
B or A
ns C_L = 50 pF
OE
R_L = 500 Ω
A or B
ns C_L = 50 pF
OE
R_L = 500 Ω
A or B
V_CC = 5.0±0.5 V
Item
Symbol Min
Max
Unit
Test conditions
FROM
TO
(Input)
(Output)
Propagation delay time ^*1
t_PLH
t_PHL

0.25
ns C_L = 50 pF
R_L = 500 Ω
A or B
B or A
Enable time
t_ZH
1.6
4.9
ns C_L = 50 pF
OE
t_ZL
R_L = 500 Ω
A or B
Disable time
t_HZ
1.0
4.2
ns C_L = 50 pF
OE
t_LZ
1.0
4.8
R_L = 500 Ω
A or B
Note: 1. The propagation delay is the calculated RC time constant of the typical on-state resistance of the switch and
the specified load capacitance, when driven by an ideal voltage source (zero output impedance).
Test Circuit
S1
500 Ω
*1
CL = 50 pF
500 Ω
See under table
OPEN
GND
Load circuit for outputs
Symbol S1
t_PLH / t_PHL
t_ZH / t_HZ
t_ZL / t_LZ
OPEN
OPEN
7V
Note: 1. CL includes probe and jig capacitance.
Rev.1.00 Apr 07, 2006 page 4 of 6