HD74BC573A Datasheet, PDF (4/9 Pages) Hitachi Semiconductor – Octal D Type Transparent Latches With 3 State Outputs

HD74BC573A
Switching Test Method (C_L = 50 pF)
Item
Propagation
delay time
D→Q
LE → Q
Output enable time
Output disable time
Setup time
Hold time
Pulse width
Input capacitanse
Output capacitance
Ta = 25°C
Symbol
V_CC = 5.0 V
Min
Max
t_PLH
t_PHL
t_PLH
t_PHL
t_ZH
t_ZL
t_HZ
t_LZ
t_S(H)
t_S(L)
t_h(H)
t_h(L)
t_w
C_IN
C_O
3.0
8.0
3.0
8.0
3.0
8.0
3.0
8.0
3.0
9.0
3.0
9.0
3.0
8.0
3.0
8.0
2.0
—
2.0
—
2.0
—
2.0
—
6.0
—
3.0 (Typ)
15.0 (Typ)
Ta = –40 to 85°C
V_CC = 5.0 V ±10%
Min
Max
3.0
10.0
3.0
10.0
3.0
10.0
3.0
10.0
3.0
11.0
3.0
11.0
3.0
10.0
3.0
10.0
2.0
—
2.0
—
2.0
—
2.0
—
6.0
—
—
—
Unit
ns
ns
ns
ns
ns
ns
ns
pF
pF
Test conditions
See under figure
V_IN = V_CC or GND
V_O = V_CC or GND
Test Circuit
VCC
VCC
Input
Pulse Generator
Zout _{= 50} Ω
Input
Pulse Generator
Zout = 50 Ω
OC
Output
1D to 8D
1Q to 8Q
C_L =
LE
50 pF
500 Ω
450 Ω
50 Ω Scope
*2
OPEN
7V
Notes:
1. C_L includes probe and jig capacitance.
2. OPEN: t_PLH, t_PHL, t_ZH, t_HZ, t_h, t_S, t_w
7 V: t_ZL, t_LZ
Rev.3.00, Jul.16.2004, page 4 of 8