HD74AC138_15 Datasheet, PDF (4/12 Pages) Renesas Technology Corp – 1-of-8 Decoder/Demultiplexer

HD74AC138/HD74ACT138
Logic Symbol
A0 A1 A2
E1 E2 E3
O0 O1 O2 O3 O4 O5 O6 O7
Pin Names
A₀ to A₂
E₁ to E ₂
E₃
O₀ to O ₇
Address Inputs
Enable Inputs
Enable Input
Outputs
Functional Description
The HD74AC138/HD74ACT138 high-speed 1-of-8 decoder/demultiplexer accepts three binary weighted inputs (A₀, A₁,
A₂) and, when enabled, provides eight mutually exclusive active-LOW outputs (O₀ to O₇). The
HD74AC138/HD74ACT138 features three Enable inputs, two active-Low (E₁, E₂) and one active-High (E₃). All
outputs will be High unless E₁ and E₂ are Low and E₃ is High. This multiple enabled function allows easy parallel
expansion of the device to a 1-of-32 (5 lines to 32 lines) decoder with just four HD74AC138/HD74ACT138 devices
and one inverter (See Figure a). The HD74AC138/HD74ACT138 can be used as an 8-output demultiplexer by using
one of the active Low Enable inputs as the data input and the other Enable inputs as strobes. The Enables inputs which
are not used must be permanently tied to their appropriate active-High or active-Low state.
Truth Table
Inputs
E₁
E₂
HX
E₃
X
A₀
X
XH
X
X
XX
L
X
LL
H
L
LL
H
H
LL
H
L
LL
H
H
LL
H
L
LL
H
H
LL
H
L
LL
H
H
H : High Voltage Level
L : Low Voltage Level
X : Immaterial
A₁
X
X
X
L
L
H
H
L
L
H
H
A₂
X
X
X
L
L
L
L
H
H
H
H
O₀
H
H
H
L
H
H
H
H
H
H
H
O₁
H
H
H
H
L
H
H
H
H
H
H
O₂
H
H
H
H
H
L
H
H
H
H
H
Outputs
O₃
H
O₄
H
H
H
H
H
H
H
H
H
H
H
L
H
H
L
H
H
H
H
H
H
O₅
H
H
H
H
H
H
H
H
L
H
H
O₆
H
H
H
H
H
H
H
H
H
L
H
O₇
H
H
H
H
H
H
H
H
H
H
L
Rev.2.00, Jul.16.2004, page 2 of 9