HD151TS307ARP Datasheet, PDF (4/9 Pages) Renesas Technology Corp – Spread Spectrum Clock for EMI Solution

HD151TS307ARP
DC Electrical Characteristics / SSC Clock Output
Ta = 0 to 70°C, VDD = 3.3 V±5%
Item
Symbol Min
Typ
Max Unit
Test Conditions
Output voltage
V_OH
3.1
—
—
V
V_OL
—
—
50
mV
Output current *¹
I_OH
—
–30
—
mA
I_OL
—
30
—
Note: 1. Parameters are target of design. Not 100% tested in production.
I_OH = –1 mA, VDD = 3.3 V
I_OL = 1 mA, VDD = 3.3 V
V_OH = 1.5 V
V_OL = 1.5 V
AC Electrical Characteristics / SSC Clock Output
Ta = 25°C, VDD = 3.3 V, C_L = 15 pF
Item
Cycle to cycle jitter ^{*1, 2}
Symbol Min
t_CCS
—
—
Typ
| 250 |
| 250 |
Max
| 300 |
| 300 |
Unit
ps
Test Conditions
SSCCLKOUT, 24 MHz
SSCCLKOUT, 48 MHz
Notes
SSCOFF
SEL1:0 = 10
Fig1
—
| 250 | | 300 |
—
| 250 | | 300 |
SSCCLKOUT, 24 MHz
SSCCLKOUT, 48 MHz
SSC=±0.25%
SEL1:0 = 11
Fig1
Output frequency ^{*1, 2}
—
| 250 | | 300 |
—
| 250 | | 300 |
SSCCLKOUT, 24 MHz
SSCCLKOUT, 48 MHz
SSC= ±1.5%
SEL1:0 = 01
Fig1
23.8
—
24.2
MHz SSCCLKOUT,
SSCOFF
XIN = 24 MHz
SEL1:0 = 10
47.3
—
48.7
SSCCLKOUT,
XIN = 48 MHz
23.7
—
24.3
SSCCLKOUT,
XIN = 24 MHz
SSC= ±0.25%
SEL1:0 = 11
47.2
—
48.8
SSCCLKOUT,
XIN = 48 MHz
23.4
—
24.6
SSCCLKOUT,
XIN = 24 MHz
SSC= ±1.5%
SEL1:0 = 01
46.6
—
49.4
SSCCLKOUT,
Slew rate^*1
t_SL
0.8
—
—
Clock duty cycle ^*1
45
50
55
Output impedance ^*1
—
40
—
V/ns
%
Ω
XIN = 48 MHz
@48 MHz
0.4 V to 2.4 V
Spread spectrum
modulation frequency ^*1
—
33
—
KHz @48 MHz, SSCCLKOUT
Input clock frequency
Stabilization time ^*1,3
10
—
60
—
—
2
MHz
ms
Notes: 1. Parameters are target of design. Not 100% tested in production.
2. Cycle to cycle jitter and output frequency are included spread spectrum modulation.
3. Stabilization time is the time required for the integrated circuit to obtain phase lock of its input signal after
power up.
Rev.4.00 Jul. 08, 2004 page 4 of 8