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M66335FP Datasheet, PDF (37/59 Pages) Mitsubishi Electric Semiconductor – FACSIMILE IMAGE DATA PROCESSOR
M66335FP
Address R/W
Description
0CH
W
D7
D6
D5
D4
D3
D2
D1
D0
MAX_UP
MAX_DOWN
MIN_UP
(Default value: 00H)
D5 D4 MAX_UP: Background Level Detection Clock for the Up Counter
0
0 Ordinary (T = (single pixel cycle) × 32)
0
1 Slow (T = (single pixel cycle) × 64)
1
0 Fast (T = (single pixel cycle) × 16)
1
1 Fastest (T = (single pixel cycle) × 8)
D3 D2 MAX_DOWN: Background Level Detection Clock for the Down Counter
0
0 Ordinary (T = (single pixel cycle) × 128)
0
1 Slow (T = (single pixel cycle) × 256)
1
0 Fast (T = (single pixel cycle) × 64)
1
1 Fastest (T = (single pixel cycle) × 32)
D1 D0
MIN_UP: Character Level Detection Clock for the Up Counter
0
0 Ordinary (T = (single pixel cycle) × 128)
0
1 Slow (T = (single pixel cycle) × 256)
1
0 Fast (T = (single pixel cycle) × 64)
1
1 Fastest (T = (single pixel cycle) × 32)
0DH
W
D7
D6
D5
D4
D3
D2
D1
D0
UL_MIN
(Default value: 1FH)
D5 to D0: UL_MIN Detection of background/character levels
Highest limit of character levels
0EH
W
D7
D6
D5
D4
D3
D2
D1
D0
LL_MAX
(Default value: 20H)
D5 to D0: LL_MAX Detection of background/character levels
Lowest limit of background levels
Lowest limit of background levels (LL_MAX) > highest limit of character levels (UL_MIN)
0FH
R/W
D7
D6
D5
D4
D3
D2
D1
D0
GAMMA_D <5:0>
D5 to D0: GAMMA_D Built-in γ memory data
10H
R/W
D7
D6
D5
D4
D3
D2
D1
D0
DITH_D <5:0>
D5 to D0: DITH_D Built-in dither memory data
REJ03F0276-0200 Rev.2.00 Jun 16, 2008
Page 37 of 58