R0E00008AKCE00EP57 Datasheet, PDF (31/35 Pages) Renesas Technology Corp – Microcomputer Development Environment System

E8a Emulator
7. Notes on Using the E8a Emulator
7.5 Operation during a user program halt
(1) Operation clock during a user program halt
When the user program halts, the emulator changes the CPU clock to the internal high-speed on-chip oscillator
clock divided by 2 (approx. 20MHz, etc.) to operate. However, the peripheral features operate with the clock
specified by the user program.
Also, when the user program halts, the following registers may not be overwritten in some cases.
DTMF control register:
016Ch
DTMF count register 0:
016Eh
DTMF count register 1:
016Fh
Timer RC counter:
0126h, 0127h
Timer RD counter:
0156h, 0157h
Timer RG counter:
0176h, 0177h
(2) Peripheral I/Os during a user program halt
During a user program halt, interrupts are not accepted although peripheral I/Os continue to run. For example, a
timer interrupt is not accepted although the timer continues to count when a user program is stopped by a break
after the timer started.
7.6 Debug functions
(1) PC break point
When downloading a user program after modifying it, the set address of PC break may not be corrected normally
depending on the modification. Therefore, break points other than the set PC breaks may shift. After downloading a
user program, check the setting of PC breaks in the event point window and reset it.
(2) “Go to cursor” function
The “Go to cursor” function is actualized using an address match break. Therefore, when you execute the “Go to
cursor” command, all the address match breaks and hardware breaks you set become invalid, while all the PC
breaks remain valid.
REJ10J1930-0100 Rev.1.00 Jun. 01, 2009
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