UPA1764 Datasheet, PDF (3/10 Pages) NEC – SWITCHING DUAL N-CHANNEL POWER MOS FET INDUSTRIAL USE

DATA SHEET
MOS FIELD EFFECT TRANSISTOR
µ PA1764
SWITCHING
DUAL N-CHANNEL POWER MOS FET
INDUSTRIAL USE
DESCRIPTION
The µ PA1764 is N-Channel MOS Field Effect Transistor
designed for high current switching applications.
FEATURES
• Dual chip type
• Low on-state resistance
RDS(on)1 = 27 mΩ TYP. (VGS = 10 V, ID = 3.5 A)
RDS(on)2 = 32 mΩ TYP. (VGS = 4.5 V, ID = 3.5 A)
RDS(on)3 = 34 mΩ TYP. (VGS = 4.0 V, ID = 3.5 A)
• Low input capacitance
Ciss = 1300 pF TYP.
• Built-in G-S protection diode
• Small and surface mount package (Power SOP8)
PACKAGE DRAWING (Unit : mm)
8
5
1
4
5.37 MAX.
1 : Source 1
2 : Gate 1
7, 8 : Drain 1
3 : Source 2
4 : Gate 2
5, 6 : Drain 2
6.0 ±0.3
4.4
0.8
1.27 0.78 MAX.
0.40
+0.10
–0.05
0.12 M
0.5 ±0.2
0.10
ORDERING INFORMATION
PART NUMBER
µPA1764G
PACKAGE
Power SOP8
ABSOLUTE MAXIMUM RATINGS (TA = 25°C, All terminals are connected.)
Drain to Source Voltage (VGS = 0 V)
VDSS
60
V
Gate to Source Voltage (VDS = 0 V)
VGSS
±20
V
Drain Current (DC) (TC = 25°C)
ID(DC)
±7
A
Drain Current (pulse) ^Note1
ID(pulse)
±28
A
Total Power Dissipation (1 unit) ^Note2
PT
1.7
W
Total Power Dissipation (2 unit) ^Note2
PT
2.0
W
EQUIVALENT CIRCUIT
(1/2 Circuit)
Drain
Channel Temperature
Storage Temperature
Tch
150
°C
Tstg –55 to + 150 °C
Gate
Body
Diode
Single Avalanche Current ^Note3
Single Avalanche Energy ^Note3
IAS
7
A
EAS
98
mJ
Notes 1. PW ≤ 10 µs, Duty cycle ≤ 1%
2. TA = 25°C, Mounted on ceramic substrate of 1200 mm² x 2.2 mm
Gate
Protection
Diode
Source
3. Starting Tch = 25°C, VDD = 30 V, RG = 25 Ω, VGS = 20 → 0 V
Remark The diode connected between the gate and source of the transistor serves as a protector against ESD.
When this device actually used, an additional protection circuit is externally required if a voltage
exceeding the rated voltage may be applied to this device.
The information in this document is subject to change without notice. Before using this document, please
confirm that this is the latest version.
Not all devices/types available in every country. Please check with local NEC representative for
availability and additional information.
Document No. G14329EJ2V0DS00 (2nd edition)
The mark 5 shows major revised points.
Date Published May 2001 NS CP(K)
©
Printed in Japan
1999, 2001