HD74LS54 Datasheet, PDF (3/4 Pages) Hitachi Semiconductor – 4-wide 2-input, 3-input AND-OR-INVERT Gates

HD74LS54
Package Dimensions
JEITA Package Code
P-SOP14-5.5x10.06-1.27
RENESAS Code
PRSP0014DF-B
Previous Code
FP-14DAV
*1 _D
14
8
Index mark
1
Z
e
7
*3 _{b p}
xM
y
MASS[Typ.]
0.23g
F
NOTE)
1. DIMENSIONS"*1 (Nom)"AND"*2"
DO NOT INCLUDE MOLD FLASH.
2. DIMENSION"*3"DOES NOT
INCLUDE TRIM OFFSET.
bp
Terminal cross section
( Ni/Pd/Au plating )
L1
θ
L
Detail F
Reference
Symbol
D
E
A2
A1
A
bp
b1
c
c1
θ
HE
e
x
y
Z
L
L1
Dimension in Millimeters
Min
Nom Max
10.06 10.5
5.50
0.00
0.10
0.20
2.20
0.34
0.40
0.46
0.15
0.20
0.25
0°
8°
7.50
7.80
8.00
1.27
0.12
0.15
1.42
0.50
0.70
0.90
1.15
Rev.2.00, Feb.18.2005, page 3 of 3