HD74HC138_15 Datasheet, PDF (3/10 Pages) Renesas Technology Corp – 3-to-8-line Decoder/Demultiplexer with Address Latch

HD74HC138
3-to-8-line Decoder/Demultiplexer with Address Latch
REJ03D0570-0300
Rev.3.00
Mar 25, 2009
Description
The HD74HC138 has 3 binary select inputs (A, B and C). If the device is enabled these inputs determine which one of
the eight normally high outputs will go low. Two active low and one active high enables (G₁, G_2A and G_2B) are
provided to ease the cascading of decoders.
Features
• High Speed Operation: t_pd (A, B, C to Y) = 16.5 ns typ (C_L = 50 pF)
• High Output Current: Fanout of 10 LSTTL Loads
• Wide Operating Voltage: V_CC = 2 V to 6 V
• Low Input Current: 1 µA max
• Low Quiescent Supply Current: I_CC (static) = 4 µA max (Ta = 25°C)
• Ordering Information
Part Name
Package Type
Package Code
(Previous Code)
HD74HC138P
DILP-16 pin
PRDP0016AE-B
(DP-16FV)
HD74HC138FPEL
SOP-16 pin (JEITA)
PRSP0016DH-B
(FP-16DAV)
HD74HC138RPEL
SOP-16 pin (JEDEC)
PRSP0016DG-A
(FP-16DNV)
HD74HC138TELL
TSSOP-16 pin
PTSP00016JB-A
(TTP-16DAV)
Note: Please consult the sales office for the above package availability.
Package
Abbreviation
P
FP
RP
T
Taping Abbreviation
(Quantity)
—
EL (2,000 pcs/reel)
EL (2,500 pcs/reel)
ELL (2,000 pcs/reel)
REJ03D0570-0300 Rev.3.00 Mar 25, 2009
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