7480_M Datasheet, PDF (278/337 Pages) Renesas Technology Corp – 8-BIT SINGLE-CHIP MICROCOMPUTER 740 FAMILY / 7470 SERIES

APPENDICES
3.1 Control Registers
Timer Y (Timer Y latch)
b7 b6 b5 b4 b3 b2 b1 b0
Timer Y (high-order) (TYH) [Address 00F316]
b7 b6 b5 b4 b3 b2 b1 b0
Timer Y (low-order) (TYL) [Address 00F216]
b
Function
0 The low-order count value of
1 ^{timer Y is indicated.}
2
3
4
5
6
7
At reset
1
1
1
1
1
1
1
1
RW
O
O
O
O
Note 1
O
O
O
O
b
Function
At reset
0 The high-order count value of 1
1 ^{timer Y is indicated.}
1
2
1
3
1
4
1
5
1
6
1
7
1
RW
O
O
O
O
Note 1
O
O
O
O
Notes 1: Do not write to these bits in pulse period measurement mode or pulse width measurement mode.
2: When b3 of timer Y mode register is ‘0’, writing to latch and timer is simultaneously
performed. When b3 is ‘1’, writing to only latch is performed.
3: When reading/writing from/to timer Y, read/write from/to both high-order and low-order bytes.
At reading, read the high-order byte and the low-order byte in this order.
At writing, write the low-order byte and the high-order byte in this order.
Figure 3.1.18 Timer Y
Timer 1 (Timer 1 latch)
b7 b6 b5 b4 b3 b2 b1 b0
Timer1 (T1) [Address 00F416]
b
Function
0 The timer 1 count value is indicated.
1
2
3
4
5
6
7
Figure 3.1.19 Timer 1
At reset R W
1
OO
1
OO
1
OO
1
OO
1
OO
1
OO
1
OO
1
OO
7480 Group and 7481 Group User's Manual
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