R5F10RB8AFP Datasheet, PDF (27/76 Pages) Renesas Technology Corp – Integrated LCD controller/driver, True Low Power Platform (as low as 75 μA/MHz, and 0.64 μA for RTC + LVD), 1.6 V to 5.5 V operation, 8 to 32 Kbyte Flash, 31 DMIPS at 24 MHz, for All LCD Based Applications

Under development ^{Preliminary document}
Specifications in this document are tentative and subject to change.
RL78/L12
2. ELECTRICAL SPECIFICATIONS (TARGET)
Caution The pins mounted depend on the product. Refer to 1.3.1 32-pin products to 1.3.5 64-pin
products.
(TA = −40 to +85°C, 1.6 V ≤ EVDD = VDD ≤ 5.5 V, VSS = EVSS = 0 V)
Items
Symbol
Conditions
MIN. TYP. MAX. Unit
Output voltage, VOH1
P10 to P17, P30 to P32, P40 to P43, 4.0 V ≤ EVDD ≤ 5.5 V, T.B.D.
V
high
P50 to P54, P70 to P74, P120,
T.B.D.
P125 to P127, P130, P140 to P147 _{4.0 V ≤ EVDD ≤ 5.5 V, T.B.D.}
V
T.B.D.
2.7 V ≤ EVDD ≤ 5.5 V, T.B.D.
V
T.B.D.
1.8 V ≤ EVDD ≤ 5.5 V, T.B.D.
V
T.B.D.
1.6 V ≤ EVDD < 5.5 V, T.B.D.
V
T.B.D.
VOH2
P20, P21
1.6 V ≤ VDD ≤ 5.5 V, T.B.D
V
T.B.D.
Output voltage, VOL1
low
P10 to P17, P30 to P32, P40 to P43,
P50 to P54, P70 to P74, P120,
P125 to P127, P130, P140 to P147
4.0 V ≤ EVDD ≤ 5.5 V,
T.B.D.
4.0 V ≤ EVDD ≤ 5.5 V,
T.B.D.
T.B.D.
V
T.B.D.
V
2.7 V ≤ EVDD ≤ 5.5 V,
T.B.D.
T.B.D.
V
2.7 V ≤ EVDD ≤ 5.5 V,
T.B.D.
T.B.D.
V
1.8 V ≤ EVDD ≤ 5.5 V,
T.B.D.
T.B.D.
V
1.6 V ≤ EVDD < 5.5 V,
T.B.D.
T.B.D.
V
VOL2
P20, P21
1.6 V ≤ VDD ≤ 5.5 V,
T.B.D.
T.B.D.
V
VOL3
P60, P61
4.0 V ≤ EVDD ≤ 5.5 V,
T.B.D.
T.B.D.
V
4.0 V ≤ EVDD ≤ 5.5 V,
T.B.D.
T.B.D.
V
2.7 V ≤ EVDD ≤ 5.5 V,
T.B.D.
T.B.D.
V
1.8 V ≤ EVDD ≤ 5.5 V,
T.B.D.
T.B.D.
V
1.6 V ≤ EVDD < 5.5 V,
T.B.D.
T.B.D.
V
Caution P10, P12, P15, P17 do not output high level in N-ch open-drain mode.
Remark Unless specified otherwise, the characteristics of alternate-function pins are the same as those of the
port pins.
R01DS0157EJ0001 Rev.0.01
2012.02.20
Page 27 of 73