H836057 Datasheet, PDF (265/592 Pages) Renesas Technology Corp – Renesas 16-Bit Single-Chip Microcomputer H8 Family/H8/300H Tiny Series

Section 12 Timer Z
IMF Flag Set Timing at Input Capture: When an input capture signal is generated, the IMF flag
is set to 1 and the value of TCNT is simultaneously transferred to corresponding GR. Figure 12.49
shows the timing.
φ
Input capture
signal
IMF
TCNT
N
GR
N
ITMZ
Figure 12.49 IMF Flag Set Timing at Input Capture
Overflow Flag (OVF) Set Timing: The overflow flag is set to 1 when the TCNT overflows.
Figure 12.50 shows the timing.
φ
TCNT
Overflow
signal
OVF
ITMZ
H'FFFF
H'0000
Figure 12.50 OVF Flag Set Timing
Rev. 4.00 Mar. 15, 2006 Page 233 of 556
REJ09B0026-0400