H83827R Datasheet, PDF (264/663 Pages) Renesas Technology Corp – Renesas 8-Bit Single-Chip Microcomputer H8 Family/H8/300L Super Low Power Series

Section 8 I/O Ports
8.9.2 Register Configuration and Description
Table 8.23 shows the port A register configuration.
Table 8.23 Port A Registers
Name
Port data register A
Port control register A
Abbr.
PDRA
PCRA
R/W
Initial Value Address
R/W
H'F0
H'FFDD
W
H'F0
H'FFED
1. Port Data Register A (PDRA)
Bit
7
6
5
4
3
2
1
0
—
—
—
—
PA ₃
PA ₂
PA ₁
PA ₀
Initial value
1
1
1
1
0
0
0
0
Read/Write
—
—
—
—
R/W
R/W
R/W
R/W
PDRA is an 8-bit register that stores data for port A pins PA₃ to PA₀. If port A is read while
PCRA bits are set to 1, the values stored in PDRA are read, regardless of the actual pin states. If
port A is read while PCRA bits are cleared to 0, the pin states are read.
Upon reset, PDRA is initialized to H'F0.
2. Port Control Register A (PCRA)
Bit
7
6
5
4
3
2
1
0
—
—
—
—
PCRA ₃ PCRA ₂ PCRA ₁ PCRA ₀
Initial value
1
1
1
1
0
0
0
0
Read/Write
—
—
—
—
R/W
R/W
R/W
R/W
PCRA controls whether each of port A pins PA₃ to PA₀ functions as an input pin or output pin.
Setting a PCRA bit to 1 makes the corresponding pin an output pin, while clearing the bit to 0
makes the pin an input pin. PCRA and PDRA settings are valid when the corresponding pins are
designated for general-purpose input/output by LPCR.
Upon reset, PCRA is initialized to H'F0.
PCRA is a write-only register, which always reads all 1s.
Rev. 6.00 Aug 04, 2006 page 230 of 626
REJ09B0144-0600