H83687 Datasheet, PDF (25/536 Pages) Renesas Technology Corp – Renesas 16-Bit Single-Chip Microcomputer H8 Family / H8/300H Tiny Series

Figure 13.59 When Compare Match and Bit Manipulation Instruction to TOCR
Occur at the Same Timing..................................................................................... 250
Section 14 Watchdog Timer
Figure 14.1 Block Diagram of Watchdog Timer ........................................................................ 251
Figure 14.2 Watchdog Timer Operation Example...................................................................... 254
Section 15 14-Bit PWM
Figure 15.1 Block Diagram of 14-Bit PWM .............................................................................. 255
Figure 15.2 Waveform Output by 14-Bit PWM ......................................................................... 258
Section 16 Serial Communication Interface 3 (SCI3)
Figure 16.1 Block Diagram of SCI3 ........................................................................................... 261
Figure 16.2 Data Format in Asynchronous Communication ...................................................... 276
Figure 16.3 Relationship between Output Clock and Transfer Data Phase
(Asynchronous Mode) (Example with 8-Bit Data, Parity, Two Stop Bits) ............. 276
Figure 16.4 Sample SCI3 Initialization Flowchart ..................................................................... 277
Figure 16.5 Example of SCI3 Transmission in Asynchronous Mode
(8-Bit Data, Parity, One Stop Bit) ........................................................................... 278
Figure 16.6 Sample Serial Transmission Data Flowchart (Asynchronous Mode)...................... 279
Figure 16.7 Example of SCI3 Reception in Asynchronous Mode
(8-Bit Data, Parity, One Stop Bit) ........................................................................... 280
Figure 16.8 Sample Serial Reception Data Flowchart (Asynchronous Mode) (1)...................... 282
Figure 16.8 Sample Serial Reception Data Flowchart (Asynchronous Mode) (2)...................... 283
Figure 16.9 Data Format in Clocked Synchronous Communication .......................................... 284
Figure 16.10 Example of SCI3 Transmission in Clocked Synchronous Mode........................... 286
Figure 16.11 Sample Serial Transmission Flowchart (Clocked Synchronous Mode) ................ 287
Figure 16.12 Example of SCI3 Reception in Clocked Synchronous Mode................................ 288
Figure 16.13 Sample Serial Reception Flowchart (Clocked Synchronous Mode)...................... 289
Figure 16.14 Sample Flowchart of Simultaneous Serial Transmit and Receive Operations
(Clocked Synchronous Mode)............................................................................... 291
Figure 16.15 Example of Inter-Processor Communication Using Multiprocessor Format
(Transmission of Data H'AA to Receiving Station A) .......................................... 293
Figure 16.16 Sample Multiprocessor Serial Transmission Flowchart ........................................ 294
Figure 16.17 Sample Multiprocessor Serial Reception Flowchart (1)........................................ 296
Figure 16.17 Sample Multiprocessor Serial Reception Flowchart (2)........................................ 297
Figure 16.18 Example of SCI3 Reception Using Multiprocessor Format
(Example with 8-Bit Data, Multiprocessor Bit, One Stop Bit).............................. 298
Figure 16.19 Receive Data Sampling Timing in Asynchronous Mode ...................................... 301
Section 17 I²C Bus Interface 2 (IIC2)
Figure 17.1 Block Diagram of I²C Bus Interface 2..................................................................... 304
Rev.5.00 Nov. 02, 2005 Page xxv of xxxii