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RAA23040X Datasheet, PDF (24/29 Pages) Renesas Technology Corp – 3-ch Step-Down Switching Regulator + 1-ch LDO
Notes on Use
Condition where Protection Circuits do not operate
When the SCP pin is connected to the AGND pin, the short-circuit protection circuit and thermal shutdown circuit do
not operate.
Pin Connection
Be sure to apply the same voltage to AVDD pin and VPIN pin (except VPIN2).
VPIN2 Input Voltage
VPIN2 input voltage should be same or less than AVDD.
PG1 Connection
When using power good (PG1 pin), connect it to ch1 output. If PG1 is connected to AVDD, PG1 outputs high (AVDD)
when SHDNB0 is low (because PG1 is high impedance when SHDNB0 is low).
Actual Pattern Wiring
To actually perform pattern wiring, separate the ground of the control signals from the ground of the power signals, so
that these signals do not have a common impedance as much as possible. In addition, lower the high-frequency
impedance by using a capacitor, so that noise is not superimposed on the VREF pin, VREG pin.
Connection of Exposed PAD (only TQFP package)
TQFP package has an exposed pad on the bottom to improve radiation performance. On the mounting board, connect
this exposed pad to AGND.
Fixed Usage of Control Input Pin
When using fixed input pins SHDNB0 to SHDNB4, CTL4 and SAVE input pins, connect each input to the pins listed
below.
SHDNB0
SHDNB1
SHDNB2
SHDNB3
SHDNB4
CTL4
SAVE
Input Pin
Fixed to Low Level
AGND
AGND
AGND
AGND
AGND
AGND
AGND
Connect Pin
Fixed to High Level
AVDD
AVDD
AVDD
AVDD
AVDD
AVDD
AVDD
R18DS0004EJ0102 Rev. 1.02
Jul.09, 2013
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