R32C142_15 Datasheet, PDF (23/126 Pages) Renesas Technology Corp – RENESAS MCU

R32C/142 Group and R32C/145 Group
3. Memory
3. Memory
Figure 3.1 shows the memory map of the R32C/142 Group and R32C/145 Group.
The R32C/142 Group and R32C/145 Group provide a 4-Gbyte address space from 00000000h to
FFFFFFFFh.
The internal ROM is mapped from address FFFFFFFFh in the inferior direction. For example, the 512-Kbyte
internal ROM is mapped from FFF80000h to FFFFFFFFh.
The fixed interrupt vector table contains the start address of interrupt handlers and is mapped from
FFFFFFDCh to FFFFFFFFh.
The internal RAM is mapped from address 00000400h in the superior direction. For example, the 32-Kbyte
internal RAM is mapped from 00000400h to 000083FFh. Besides being used for data storage, the internal
RAM functions as a stack(s) for subroutine calls and/or interrupt handlers.
Special function registers (SFRs), which are control registers for peripheral functions, are mapped from
00000000h to 000003FFh, and from 00040000h to 0004FFFFh. Unoccupied SFR locations are reserved,
and no access is allowed.
00000000h
00000400h
00008400h
SFR1
Internal RAM
Reserved
00040000h
00050000h
00060000h
00062000h
SFR2
Reserved
Internal ROM
(Data space) ⁽¹⁾
Internal ROM
Capacity YYYYYYYYh
256 Kbytes FFFC0000h
512 Kbytes FFF80000h
Reserved
YYYYYYYYh
FFFFFFFFh
Internal ROM
FFFFFFDCh
FFFFFFFFh
Undefined instruction
Overflow
BRK instruction
Reserved
Reserved
Watchdog timer ⁽²⁾
Reserved
NMI
Reset
Notes:
1. Additional two 4-Kbyte spaces (blocks A and B) for storing data are provided in the flash memory version.
2. The watchdog timer interrupt shares the vector table with the oscillator stop detection interrupt.
Figure 3.1 Memory Map
R01DS0071EJ0110 Rev.1.10
Sep 09, 2011
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