R32C118 Datasheet, PDF (23/124 Pages) Renesas Technology Corp – RENESAS MCU

R32C/118 Group
2. Central Processing Unit (CPU)
2. Central Processing Unit (CPU)
The CPU contains registers as shown below. There are two register banks each consisting of registers
R2R0, R3R1, R6R4, R7R5, A0 to A3, SB, and FB.
General purpose
registers
R2R0
R3R1
R6R4
R7R5
b31
b23
b15
b7
b0
R2H R2L R0H R0L
R3H R3L R1H R1L
R6
R4
R7
R5
A0
A1
A2
A3
SB
FB
USP
ISP
INTB
PC
FLG
Data registers ⁽¹⁾
Address registers ⁽¹⁾
Static base register ⁽¹⁾
Frame base register ⁽¹⁾
User stack pointer
Interrupt stack pointer
Interrupt vector table base register
Program counter
Flag register
b31
b24 b23
b16 b15
b8 b7
b0
RND
IPL
U I OBSZDC
DP
FU
FO
Blank fields represent reserved.
Fast interrupt
registers
DMAC-associated
registers ⁽²⁾
b31
SVF
SVP
VCT
b0
Save flag register
Save PC register
Vector register
b31
b23
b0
DDDDDDDDDDDDDDMDDSDSDDDDMDDSDSMDDSSRRAADMDSDSRRAADDDRARA0D0000DDRRAA0D0000DDC0C0000DDCC00000CCRTCCRTR0T0R0T00000
DMA mode register
DMA terminal count register
DMA terminal count reload register
DMA source address register
DMA source address reload register
DMA destination address register
DMA destination address reload register
Notes:
1. There are two banks of these registers.
2. There are four identical sets of DMAC-associated registers.
Figure 2.1 CPU Registers
REJ03B0255-0100 Rev.1.00 Nov 19, 2009
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